The two phases of executing an instruction are ______

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Question:
The two phases of executing an instruction are ______

1. Instruction decoding and storage

2. Instruction fetch and instruction execution

3.Instruction execution and storage

4. Instruction fetch and Instruction processing

Posted Date:-2021-03-15 06:16:58

More MCQS Questions and answers

  1. Add #%01011101,R1 , when this instruction is executed then ______
  2. Add #45, when this instruction is executed the following happen/s _______
  3. An 24 bit address generates an address space of ______ locations.
  4.  In the case of, Zero-address instruction method the operands are stored in _____
  5.  In the implementation of a Multiplier circuit in the system we make use of _______
  6.  The instruction, Add R1,R2,R3 in RTN is _______
  7.  The register used to store the flags is called as _________
  8.  The smallest entity of memory is called _______
  9.  When we perform subtraction on -7 and 1 the answer in 2’s complement form is _________
  10.  Which of the following techniques used to effectively utilize main memory?
  11. Can you perform an addition on three operands simultaneously in ALN using Add instruction?
  12. Complete the following analogy:- Registers are to RAM’s as Cache’s are to _______
  13. Does the Load instruction do the following operation/s?
  14. During the transfer of data between the processor and memory we use ______
  15. For the addition of large integers, most of the systems make use of _____
  16. If a system is 64 bit machine, then the length of each word will be _______
  17. If we want to perform memory or arithmetic operations on data in Hexa-decimal mode then we use _________ symbol before the operand.
  18. In a normal n-bit adder, to find out if an overflow as occurred we make use of ______
  19. In a system, which has 32 registers the register id is __________ long.
  20. In some pipelined systems, a different instruction is used to add to numbers which can affect the flags upon execution. That instruction is _____
  21. In the following indexed addressing mode instruction, MOV 5(R1), LOC the effective address is ______
  22. Physical memory is divided into sets of finite size called as ______
  23. RTN stands for _____
  24. The addressing mode which makes use of in-direction pointers is ______
  25. The addressing mode, where you directly specify the operand value is _______
  26. The addressing mode/s, which uses the PC instead of a general purpose register is ______
  27. The BOOT sector files of the system are stored in ______
  28. The collection of the above mentioned entities where data is stored is called ______
  29. The effective address of the following instruction is MUL 5(R1,R2).
  30. The Flag ‘V’ is set to 1 indicates that _____________
  31. The instruction, Add #45,R1 does _______
  32. The instruction, Add Loc,R1 in RTN is _____
  33. The most efficient method followed by computers to multiply two unsigned numbers is _______
  34. The processor keeps track of the results of its operations using flags called ________
  35. The technique used to store programs larger than the memory is ____________
  36. The transfer of large chunks of data with the involvement of the processor is done by _____
  37. The two phases of executing an instruction are ______
  38. The type of memory assignment used in Intel processors is _____
  39. The unit which acts as an intermediate agent between memory and backing store to reduce process time is ________
  40. To get the physical address from the logical address generated by CPU we use ________
  41. When 1101 is used to divide 100010010 the remainder is ______
  42. When generating physical addresses from a logical address the offset is stored in __________
  43. When using the Big Endian assignment to store a number, the sign bit of the number is stored in _____
  44. When we perform subtraction on -7 and -5 the answer in 2’s complement form is ________
  45. When we subtract -3 from 2 , the answer in 2’s complement form is _________
  46. Which method of representation has two representations for ‘0’?
  47. Which method/s of representation of numbers occupies a large amount of memory than others?
  48. Which representation is most efficient to perform arithmetic operations on the numbers?
  49. ____ addressing mode is most suitable to change the normal sequence of execution of instructions.
  50. _____ method is used to map logical addresses of variable length onto physical memory.
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