______ interrupt method uses register whose bits are set separately by interrupt signal for each device
1.Parallel priority interrupt
2.Serial priority interrupt
3.Daisy chaining
4. None of the mentioned
Posted Date:-2021-03-15 06:07:33
A privilege exception is raised __________
1. When a process tries to change the mode of the system
2.When a process tries to change the priority level of the other processes
3.When a process tries to access the memory allocated to other users
4. All of the mentioned
Posted Date:-2021-03-15 06:07:33
A single Interrupt line can be used to service n different devices.
1.TRUE
2.FALSE
Posted Date:-2021-03-15 06:07:33
 After the completion of the DMA transfer, the processor is notified by __________
1.Acknowledge signal
2.Interrupt signal
3.WMFC signal
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
 An interrupt that can be temporarily ignored is ___________
1.Vectored interrupt
2. Non-maskable interrupt
3.Maskable interrupt
4.High priority interrupt
Posted Date:-2021-03-15 06:07:33
 How can the processor ignore other interrupts when it is servicing one _________
1.By turning off the interrupt request line
2. By disabling the devices from sending the interrupts
3.BY using edge-triggered request lines
4.All of the mentioned
Posted Date:-2021-03-15 06:07:33
 If during the execution of an instruction an exception is raised then __________
1.The instruction is executed and the exception is handled
2.The instruction is halted and the exception is handled
3.The processor completes the execution and saves the data and then handle the exception
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
 In intel’s IA-32 architecture there is a separate 16 bit address space for the I/O devices.
1.FALSE
2.TRUE
Posted Date:-2021-03-15 06:07:33
 Interrupts initiated by an instruction is called as _______
1.Internal
2.External
3.Hardware
4.Software
Posted Date:-2021-03-15 06:07:33
 The 8085 microprocessor responds to the presence of an interrupt __________
1.As soon as the trap pin becomes ‘LOW’
2. By checking the trap pin for ‘high’ status at the end of each instruction fetch
3.By checking the trap pin for ‘high’ status at the end of execution of each instruction
4.By checking the trap pin for ‘high’ status at regular intervals
Posted Date:-2021-03-15 06:07:33
 The interrupt servicing mechanism in which the requesting device identifies itself to the processor to be serviced is ___________
1.Polling
2.Vectored interrupts
3.Interrupt nesting
4. Simultaneous requesting
Posted Date:-2021-03-15 06:07:33
 The method of accessing the I/O devices by repeatedly checking the status flags is ___________
1.Program-controlled I/O
2.Memory-mapped I/O
3. I/O mapped
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
 The return address from the interrupt-service routine is stored on the ___________
1.System heap
2.Processor register
3.Processor stack
4. Memory
Posted Date:-2021-03-15 06:07:33
 The starting address sent by the device in vectored interrupt is called as __________
1.Location id
2.Interrupt vector
3.Service location
4.Service id
Posted Date:-2021-03-15 06:07:33
 To overcome the lag in the operating speeds of the I/O device and the processor we use ___________
1.BUffer spaces
2.Status flags
3.Interrupt signals
4. Exceptions
Posted Date:-2021-03-15 06:07:33
CPU as two modes privileged and non-privileged. In order to change the mode from privileged to non-privileged.
1. A hardware interrupt is needed
2.A software interrupt is needed
3.Either hardware or software interrupt is needed
4. A non-privileged instruction (which does not generate an interrupt)is needed
Posted Date:-2021-03-15 06:07:33
How is a privilege exception dealt with?
1.The program is halted and the system switches into supervisor mode and restarts the program execution
2.The Program is stopped and removed from the queue
3.The system switches the mode and starts the execution of a new process
4.The system switches mode and runs the debugger
Posted Date:-2021-03-15 06:07:33
In daisy chaining device 0 will pass the signal only if it has ___
1.Interrupt request
2.No interrupt request
3.Both No interrupt and Interrupt request
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
In DMA transfers, the required signals and addresses are given by the __________
1.Processor
2. Device drivers
3.DMA controllers
4. The program itself
Posted Date:-2021-03-15 06:07:33
In trace mode of operation is ________
1.The program is interrupted after each detection
2.The program will not be stopped and the errors are sorted out after the complete program is scanned
3.There is no effect on the program, i.e the program is executed without rectification of errors
4.The program is halted only at specific points
Posted Date:-2021-03-15 06:07:33
In vectored interrupts, how does the device identify itself to the processor?
1.By sending its device id
2.By sending the machine code for the interrupt service routine
3.By sending the starting address of the service routine
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
Interrupts form an important part of _____ systems.
1.Batch processing
2.Multitasking
3.Real-time processing
4.Multi-user
Posted Date:-2021-03-15 06:07:33
In memory-mapped I/O ____________
1.The I/O devices and the memory share the same address space
2.The I/O devices have a separate address space
3. The memory and I/O devices have an associated address space
4.A part of the memory is specifically set aside for the I/O operation
Posted Date:-2021-03-15 06:07:33
The added output of the bits of the interrupt register and the mask register is set as an input of ______________
1.Priority decoder
2.Priority encoder
3.Process id encoder
4.Multiplexer
Posted Date:-2021-03-15 06:07:33
The advantage of I/O mapped devices to memory mapped is _________
1.The former offers faster transfer of data
2. The devices connected using I/O mapping have a bigger buffer space
3.The devices have to deal with fewer address lines
4.No advantage as such
Posted Date:-2021-03-15 06:07:33
The code sent by the device in vectored interrupt is _____ long.
1.upto 16 bits
2. upto 32 bits
3. upto 24 bits
4.4-8 bits
Posted Date:-2021-03-15 06:07:33
The DMA differs from the interrupt mode by __________
1.The involvement of the processor for the operation
2.The method of accessing the I/O devices
3.The amount of data transfer possible
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
The DMA transfers are performed by a control circuit called as __________
1.Device interface
2.DMA controller
3.Data controller
4.Overlooker
Posted Date:-2021-03-15 06:07:33
The instructions which can be run only supervisor mode are?
1.Non-privileged instructions
2.System instructions
3.Privileged instructions
4.Exception instructions
Posted Date:-2021-03-15 06:07:33
The interrupt-request line is a part of the ___________
1.Data line
2.Control line
3.Address line
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
The method of synchronising the processor with the I/O device in which the device sends a signal when it is ready is?
1.Exceptions
2.Signal handling
3.Interrupts
4.DMA
Posted Date:-2021-03-15 06:07:33
The method which offers higher speeds of I/O transfers is ___________
1.Interrupts
2.Memory mapping
3.Program-controlled I/O
4.DMA
Posted Date:-2021-03-15 06:07:33
The process wherein the processor constantly checks the status flags is called as ___________
1.Polling
2. Inspection
3.Reviewing
4. Echoing
Posted Date:-2021-03-15 06:07:33
The processor indicates to the devices that it is ready to receive interrupts ________
1.By enabling the interrupt request line
2. By enabling the IRQ bits
3.By activating the interrupt acknowledge line
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
The program used to find out errors is called __________
1.Debugger
2. Compiler
3.Assembler
4. Scanner
Posted Date:-2021-03-15 06:07:33
The resistor which is attached to the service line is called _____
1. Push-down resistor
2.Pull-up resistor
3.Break down resistor
4.Line resistor
Posted Date:-2021-03-15 06:07:33
The signal sent to the device from the processor to the device after receiving an interrupt is _______
1. Interrupt-acknowledge
2.Return signal
3.Service signal
4. Permission signal
Posted Date:-2021-03-15 06:07:33
The system is notified of a read or write operation by ___________
1.Appending an extra bit of the address
2.Enabling the read or write bits of the devices
3.Raising an appropriate interrupt signal
4. Sending a special signal along the BUS
Posted Date:-2021-03-15 06:07:33
The time between the receiver of an interrupt and its service is ______
1.Interrupt delay
2.Interrupt latency
3.Cycle time
4.Switching time
Posted Date:-2021-03-15 06:07:33
The two facilities provided by the debugger is __________
1.Trace points
2.Break points
3.Compile
4. Both Trace and Break points
Posted Date:-2021-03-15 06:07:33
The usual BUS structure used to connect the I/O devices is ___________
1. Star BUS structure
2. Multiple BUS structure
3. Single BUS structure
4.Node to Node BUS structure
Posted Date:-2021-03-15 06:07:33
What are the different modes of operation of a computer?
1.User and System mode
2.User and Supervisor mode
3. Supervisor and Trace mode
4. Supervisor, User and Trace mode
Posted Date:-2021-03-15 06:07:33
What is the operation in Breakpoint mode?
1.The program is interrupted after each detection
2.The program will not be stopped and the errors are sorted out after the complete program is scanned
3.There is no effect on the program, i.e the program is executed without rectification of errors
4.The program is halted only at specific points
Posted Date:-2021-03-15 06:07:33
When dealing with multiple devices interrupts, which mechanism is easy to implement?
1.Polling method
2.Vectored interrupts
3.nterrupt nesting
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
Which interrupt is unmaskable?
1.RST 5.5
2.RST 7.5
3.TRAP
4. Both RST 5.5 and 7.5
Posted Date:-2021-03-15 06:07:33
Which table handle stores the addresses of the interrupt handling sub-routines?
1. Interrupt-vector table
2.Vector table
3.Symbol link table
4.None of the mentioned
Posted Date:-2021-03-15 06:07:33
___ is/are types of exceptions.
1.Trap
2.Interrupt
3.System calls
4.All of the mentioned
Posted Date:-2021-03-15 06:07:33
________ method is used to establish priority by serially connecting all devices that request an interrupt.
1.Vectored-interrupting
2.Daisy chain
3. Priority
4. Polling
Posted Date:-2021-03-15 06:07:33
____________ register is used for the purpose of controlling the status of each interrupt request in parallel priority interrupt.
1.Mass
2.Mark
3.Make
4.Mask
Posted Date:-2021-03-15 06:07:33